Nvidia Vera CPU targets clouds with 88 Arm cores and Rubin ties

The Nvidia Vera CPU is the company’s clearest move yet into the server processor market dominated by Intel and AMD: an 88-core Armv9.2 chip with 176 threads, support for up to 1.5 TB of LPDDR5X memory and availability as a standalone platform rather than only as a GPU companion. Nvidia says Alibaba, ByteDance, Meta, Oracle, CoreWeave, Lambda, Nebius and NScale plan to deploy Vera in their clouds.

The pitch is narrower than the marketing suggests. Nvidia is positioning Vera for two jobs: acting as the CPU head node in Vera Rubin AI systems and hosting AI agents, whose orchestration code and tool calls typically run on CPUs rather than GPUs. The company has disclosed detailed architecture in a whitepaper, but its performance claims remain vendor-provided.

What is the Nvidia Vera CPU?

Vera is the successor to Nvidia’s Grace CPU and uses a monolithic compute die, which Nvidia says is made on TSMC’s 3nm process. Unlike AMD’s server chips, which spread cores across multiple compute dies, Vera keeps all 88 cores on one piece of silicon and surrounds it with separate chiplets for memory and I/O.

The package includes eight LPDDR5X memory controllers, PCIe 6.4 and CXL 3.1 connectivity, and a separate NVLink chip-to-chip interface. Nvidia argues the monolithic design helps core-to-core bandwidth and latency, a claim that will depend heavily on workload and needs independent testing on production systems.

In dual-socket form, which Nvidia calls the Vera CPU Superchip, two Vera CPUs are connected over NVLink-C2C with 1.8 TB/s of bidirectional bandwidth. That configuration totals 176 cores and 352 threads, fed by 16 SOCAMM2 LPDDR5X memory modules delivering 2.4 TB/s of aggregate memory bandwidth. Nvidia’s reference design for agentic AI racks goes as high as 128 superchips, or 256 CPUs, for 22,528 cores and 384 TB of memory in a liquid-cooled rack.

What are Nvidia Olympus cores?

Vera uses Nvidia’s Olympus core, an Armv9.2-compatible design. That is a shift from earlier Grace products, which used off-the-shelf Arm cores including Neoverse V2, Neoverse V3, Cortex X925 and A725, depending on the system.

According to Nvidia’s whitepaper, Olympus has a 10-wide decoder and dispatch, eight integer arithmetic logic units, six vector and floating-point pipelines, four load units and two store units. Each core has 64 KB of L1 instruction cache, 96 KB of L1 data cache and 2 MB of L2 cache, while the chip includes 164 MB of system-level cache sharded across the processor.

Nvidia says Olympus also includes a custom neural branch predictor that can evaluate two possible branches at once. Branch prediction is the CPU’s attempt to guess which code path comes next, reducing idle time when the guess is right. Nvidia claims the feature is useful for branch-heavy software, including Python generated by AI coding tools.

The core also supports what Nvidia calls spatial multithreading. Rather than conventional x86-style simultaneous multithreading, Olympus can operate more like one larger core or two narrower ones sharing cache. Nvidia says that could help isolate an agent workload from its container runtime, though that remains a workload-specific claim.

How does Vera compare with Intel and AMD server CPUs?

Vera’s memory subsystem is a central part of Nvidia’s case. The company says a single socket delivers 1.2 TB/s of memory bandwidth, or about 14 GB/s per core, while the LPDDR5X memory subsystem consumes 30 to 40 watts under sustained load compared with 100 to 200 watts for a traditional server memory platform. Vera’s configurable TDP is 250 watts to 450 watts.

The comparison window may be short. AMD’s upcoming Venice Epyc chips are expected to support up to 256 cores and memory bandwidth ranging from 1 TB/s to 1.6 TB/s depending on RDIMM or MRDIMM configurations. Intel’s 192-core Diamond Rapids platform has not been fully detailed in the same way.

Vera also brings PCIe 6.4 and CXL 3.1 support. A single socket supports 96 lanes, enough for six x16 slots, while the dual-socket Superchip supports 176 lanes. CXL 3.1 matters because it enables fabric-based memory sharing, a feature cloud operators could use for pooled memory systems if the software and economics line up.

Nvidia estimates Vera delivers 1.8 times higher per-core performance than AMD’s 128-core Epyc 9755 in representative agentic workloads and up to 2.6 times higher performance in graph traversal. Those claims compare Vera against AMD’s Turin generation, and CPU benchmarks are easy to select around favorable cases. The useful test will be independent runs on shipping hardware, especially as Intel and AMD refresh their own data center CPUs.

This story draws on original reporting from The Register.