Synopsys physical AI push centers on Ansys co-design and chip agents

Synopsys physical AI strategy is now tied closely to its Ansys acquisition and a set of agent-based chip design workflows, according to Prith Banerjee, Synopsys’ senior vice president of innovation. In comments to SiliconANGLE’s theCUBE at AMD Advancing AI 2026, Banerjee said the company is trying to address a harder design problem: chips with hundreds of billions of transistors, tight thermal limits and software that must be built before the hardware exists.

No pricing, revenue impact, headcount change or customer spending tied to these workflows was disclosed. The practical claim is narrower: Synopsys says combining electronic design automation with Ansys’ simulation capabilities can let engineering teams model physical behavior, such as heat and stress, while work continues on hardware and software in parallel.

What is Synopsys doing with physical AI?

Synopsys is framing physical AI as the design challenge created when intelligent, software-defined systems rely on increasingly complex silicon in cars, data centers and other infrastructure. Banerjee said chip design is an unusually strong use case for AI because the engineering task has become too complex for older sequential methods alone.

The company’s answer is co-design: developing and simulating multiple parts of a system at the same time rather than treating silicon, software and physical constraints as separate stages. Banerjee said the Synopsys-Ansys combination helps developers simulate thermal stress while software is being written for hardware that has not yet been manufactured.

The thermal point matters for AI infrastructure. Banerjee said designers cannot solve the problem by overbuilding chips with extra material or excessive safety margins, because more transistors can translate into far higher power use. He specifically pointed to the power burden that would follow from adding several times more transistors without tighter design control.

Agentic workflows enter the EDA pitch

Synopsys is also pitching multi-agent workflows for chip programs, with digital assistants working alongside human engineers on repetitive design tasks. Banerjee said these systems are intended to reduce time to tape-out on complex semiconductor projects, including work for AMD and other chip companies.

That claim fits a broader shift across enterprise software: vendors are recasting automation features as agents that can coordinate tasks across workflows. For chip design, the useful test is whether those agents can produce reliable gains inside signoff-heavy engineering processes where errors are expensive and late changes are painful. Banerjee did not provide benchmark data, time savings, tape-out metrics or adoption numbers.

Synopsys is also trying to make its tooling more accessible to startups through a cloud-based startup program. Banerjee said early-stage companies can use Synopsys licenses through the cloud rather than buying expensive licenses upfront. The company did not disclose the program’s pricing structure, eligibility rules or usage figures.

Why Ansys matters to Synopsys’ chip design story

Ansys gives Synopsys a stronger position in simulation beyond traditional EDA, particularly where chip behavior is shaped by heat, power, materials and system-level constraints. That is the strategic logic Banerjee emphasized: modern chip programs need design and physical simulation to happen together because performance and power are now tightly coupled.

Banerjee also said Synopsys is looking at quantum computing as a future area for electronic design automation. He predicted quantum computing will eventually have a mainstream breakout moment and said Synopsys wants to be prepared, but no product timeline or commercial plan was disclosed.

Banerjee’s remarks were made during a theCUBE interview at AMD Advancing AI 2026. SiliconANGLE disclosed that theCUBE was a paid media partner for the event and said AMD and other sponsors did not have editorial control over the coverage.

This story draws on original reporting from SiliconANGLE.